This course [PART 1] is given to second year engineering students of CentraleSupélec. Professor is Didier Dumur.
The objective of this course is to understand the structure and the interactions among existing systems or systems under development, process information and take decisions.
In this direction, it is necessary to highlight signals influencing the state of this system (so-called inputs), and signals which enable to characterize this state or which are related to predefined specifications (so-called outputs).
Based on the analysis of the control signals and disturbances, the following step is to determine the structure of the best control law adapted to the problem.
This needs analysing the features of the system, comparing these features to the specified ones, in order to select, design and validate the most adequate control law, first in simulation then on an experimental platform.
Romain Bourdais, Antoine Chaillet, Jean-Luc Collette, Gilles Duc, Didier Dumur, Emmanuel Godoy, Maria Makarova, Cristina Maniu, Houria Siguerdidjane, Sihem Tebbani, Cristina Vlad